13Инициализация SMM50Нумерация шин PCI51Передача ресурсов на шину PCI92Обнаружение присутствия клавиатуры90Переустановка клавиатуры94Очистка входного буфера клавиатуры95Самотестирование клавиатурыEBВызов графических режимов BIOS58Переустановка шины USB5AПереустановка шины PATA/SATA и всех устройств92Обнаружение присутствия клавиатуры90Переустановка клавиатуры94Очистка входного буфера клавиатуры5AПереустановка шины PATA/SATA и всех устройств28Тестирование памяти90Переустановка клавиатуры94Очистка входного буфера клавиатурыE7Ожидание воода данных пользователем01INT 1900Готово для перезагрузки
| NMI Disable | NMI interrupt line to the CPU is disabled by setting bit 7 I?O port 70h (CMOS) |
| Power On Delay | Once the keyboard controller gets power, it sets the hard and soft reset bits. Check the keyboard controller or clock generator if a failure occurs |
| Initialize Chipsets | Check the BIOS, CLOCK and chipsets |
| Reset Determination | The BIOS reads the bits in the keyboard controller to see if a hard or soft reset is required (a soft reset will not test memory above 64K). Failure could be the BIOS or keyboard controller |
| ROM BIOS Checksum | The BIOS performs a checksum on itself and adds a preset factory value that should make it equal to 00. If a failure occurs, check the BIOS chips |
| Keyboard Test | A command is sent to the 8042 keyboard controller which performs a test and sets a buffer space for commands. After the buffer is defined the BIOS sends a command byte, writes data to the buffer, checks the high order bits of the internal keyboard controller and issues a No Operation (NOP) command |
| CMOS | Shutdown byte in CMOS RAM offset 0F is tested, the BIOS checksum calculated and diagnostic byte 0E updated before the CMOS RAM area is initialized and updated for date and time. Check the RTC and CMOS chip or battery if a failure occurs |
| DMA (8237) and PIC (8259) Disable | The DMA and Programmable Interrupt Controller are disabled before the POST proceeds and further. Check the 8237 or 8259 chips if a failure occurs |
| Video Disable | The video controller is disabled and port B initialized. Check the video adapter if a failure occurs |
| Chipset Initialized and Memory Detected | Memory addressed in 64K blocks. Failure would be in the chipset. If all memory is not seen, failure could be in a chip in the block after the last one seen |
| PIT Test | The timing functions of the 8254 Programmable Interrupt Timer are tested. The PIT and RTC chips normally cause errors here |
| Memory Refresh | PIT’s ability to refresh memory is tested. If an XT, DMA controller #1 handles this. Failure is normally the PIT (8254) in AT’s or the 8237, DMA #1, in XT’s |
| Address Line | Test the address lines in the first 64K of RAM. If a failure occurs, an address line may be the problem |
| Base 64K | Data patterns are written to the first 64K of RAM, unless there is a bad RAM chip in which case you will get a failure |
| Chipset Initialization | The PIT, PIC and DMA controllers are initialized |
| Set Interrupt Table | Interrupt vector table used by PIC is installed in low memory, the first 2K |
| 8042 Keyboard Controller Check | The BIOS reads the buffer area in the keyboard controller I/O port 60. Failure here is normally the keyboard controller |
| Video Tests | The type of video adapter is checked for, then a series of tests are performed on the adapter and monitor |
| BIOS Data Area | The vector table is checked for proper operation and video memory verified before protected mode tests are entered into. This is done so that any errors found are displayed on the monitor |
| Protected Mode Tests | Perform reads and writes to all memory locations below 1MB. Failure at this point indicate a bad RAM chip, the 8042 Keyboard Controller or a data line |
| DMA Chips | The DMA registers are tested using a data pattern |
| Final Initialization | these differ with each version. Typically, the floppy and hard drives are tested and initialized and a check is made for serial and parallel devices. The information gathered is then compared against the contents of the CMOS and you will see the results of any failures on the monitor |
| BOOT | The BIOS hands over control to the Int 19 bootloader. This is where you would see error messages such as non-system disk |
| 01 | NMI is disabled and the i286 register test is about to start |
| 02 | i286 register test has passed |
| 03 | ROM BIOS checksum test (32Kb from F8000h) passed OK |
| 04 | 8259 programmable interrupt controller has initialized OK |
| 05 | CMOS interrupt disabled |
| 06 | Video system disabled and the system timer checks OK |
| 07 | 8253/4 programmable-interval timer test OK |
| 08 | Delta counter channel 2 OK |
| 09 | Delta counter channel 1 OK |
| 0A | Delta counter channel 0 OK |
| 0B | Parity status cleared |
| 0C | The refresh and system timer check OK |
| 0D | Refresh check OK |
| 0E | Refresh period checks OK |
| 10 | Ready to start 64KB base memory test |
| 11 | Address line test OK |
| 12 | 64KB base memory test OK |
| 13 | System-interrupt vectors initialized |
| 14 | 8042 keyboard controller checks OK |
| 15 | CMOS read/write test OK |
| 16 | CMOS checksum and battery OK |
| 17 | Monochrome video mode OK |
| 18 | CGA color mode set OK |
| 19 | Attempting to pass control to video ROM at C0000h |
| 1A | Returned from video ROM |
| 1B | Display memory read/write test OK |
| 1C | Display memory read/write alternative test OK |
| 1D | Video retrace test OK |
| 1E | Global equipment byte set for proper video operation |
| 1F | Ready to initialize video system |
| 20 | Video test OK |
| 21 | Video display OK |
| 22 | The power-on message is displayed |
| 30 | Ready to start the virtual-mode memory test |
| 31 | virtual memory mode test started |
| 32 | CPU has switched to virtual mode |
| 33 | Testing the memory address lines |
| 34 | Testing the memory address lines |
| 35 | Lower 1MB of RAM found |
| 36 | Memory size computation checks OK |
| 37 | Memory test in progress |
| 38 | Memory below 1MB is initialized |
| 39 | Memory above 1MB is initialized |
| 3A | Memory size is displayed |
| 3B | Ready to test the lower 1MB of RAM |
| 3C | Memory test of lower 1MB OK |
| 3D | Memory test above 1MB OK |
| 3E | Ready to shutdown for real-mode testing |
| 3F | Shutdown OK- now in real mode |
| 40 | Ready to disable gate A20 |
| 41 | A20 line disabled successfully |
| 42 | Ready to start DMA controller test |
| 4E | Address line test OK |
| 4F | System still in real mode |
| 50 | DMA page register test OK |
| 51 | Starting DMA controller 1 register test |
| 52 | DMA controller 1 test passed, starting DMA controller 2 register test |
| 53 | DMA controller 2 test passed |
| 54 | Ready to test latch on DMA controller 1 and 2 |
| 55 | DMA controller 1 and 2 latch test OK |
| 56 | DMA controller 1 and 2 configured OK |
| 57 | 8259 programmable interrupt controller initialized OK |
| 58 | 8259 programmable interrupt controller mask register OK |
| 59 | Master 8259 programmable interrupt controller mask register OK |
| 5A | Ready to check timer interrupts |
| 5B | Timer interrupt check OK |
| 5C | Ready to test keyboard interrupt |
| 5D | Error detected in timer or keyboard interrupt |
| 5E | 8259 programmable interrupt controller error |
| 5F | 8259 programmable interrupt controller OK |
| 70 | Start of keyboard test |
| 71 | Keyboard controller Ok |
| 72 | Keyboard tested OK |
| 73 | Keyboard global initialization OK |
| 74 | Floppy setup ready to start |
| 75 | Floppy controller setup OK |
| 76 | Hard disk setup ready to start |
| 77 | Hard disk controller setup OK |
| 79 | Ready to initialize timer data |
| 7A | Verifying CMOS battery power |
| 7B | CMOS battery verified OK |
| 7D | Analyzing CMOS RAM size |
| 7E | CMOS memory size updated |
| 7F | Send control to adapter ROM |
| 80 | Enable the setup routine if is pressed |
| 82 | Printer data initialization is OK |
| 83 | RS-232 data initialization is OK |
| 84 | 80×87 check and test OK |
| 85 | Display any soft-error message |
| 86 | Give control to ROM E0000h |
| 87 | Return from system ROM |
| 00 | Call the Int19 boot loader |
| 00 | Flag test; Testing of the CPU |
| 03 | Register test |
| 06 | Chipset test; System hardware initialized |
| 09 | BIOS checksum tested |
| 0C | Page register tested |
| 0F | 8254 timer tested |
| 12 | Memory refresh initialization |
| 15 | 8237 DMA controllers tested |
| 18 | 8237 DMA initialization |
| 1B | 8259 PIC initialization |
| 1E | 8259 PIC chips tested |
| 21 | Memory refresh tested |
| 24 | Base 64 address tested |
| 27 | Base 64 memory tested |
| 2A | 8742 keyboard tested |
| 2D | MC146818 RTC/CMOS |
| 30 | Protected mode started |
| 33 | Memory sizing test |
| 36 | First protected mode test passed |
| 39 | First protected mode test failed |
| 3C | CPU speed calculation |
| 3F | Read 8742 hardware switches |
| 42 | Initialize interrupt vector area |
| 45 | Verify CMOS configuration |
| 48 | Test and initialize video system |
| 4B | Unexpected interrupt tested |
| 4E | Start second protected mode test |
| 51 | Verify LDT instruction |
| 54 | Verify TR instruction |
| 57 | Verify LSL instruction |
| 5A | Verify LAR instruction |
| 5D | Verify VERR instruction |
| 60 | Address line A20 test |
| 63 | Unexpected exception tested |
| 66 | Start third protected mode test |
| 69 | Address line tested |
| 6A | Scan DDNIL bits for null pattern |
| 6C | System memory tested |
| 6F | Shadow memory tested |
| 72 | Extended memory tested |
| 75 | Verify memory configuration |
| 78 | Display CMOS error messages |
| 7B | Copy system BIOS shadow memory |
| 7E | 8254 clock tested |
| 81 | MC146818 RTC tested |
| 84 | Keyboard test |
| 87 | Determine keyboard type |
| 8A | Stuck key test |
| 8D | Initialize hardware Interrupt vectors |
| 90 | Math co-processor tested |
| 93 | Determine COM ports available |
| 96 | Determine LPT ports available |
| 99 | Initialize BIOS data area |
| 9C | Fixed/floppy controller tested |
| 9F | Floppy disk tested |
| A2 | Fixed disk tested |
| A5 | External ROM screen; Check for external ROM’s |
| A8 | System key lock test |
| AE | F1 error message test |
| AF | System boot initialization |
| B1 | Call to Interrupt 19 boot loader |
| 00 | Control to Interrupt 19 |
| 01 | NMI disabled (Bit 7 of I/O port 70h) |
| 02 | 286 register test over |
| 03 | ROM checksum OK |
| 04 | 8259 PIC initialization disabled |
| 05 | CMOS Interrupt disabled |
| 06 | System timer (PIT) counting OK |
| 07 | Channel 0 of 8259 PIC test OK |
| 08 | DMA channel 2 of delta count test OK |
| 09 | DMA channel 1 of delta count test OK |
| 0A | DMA channel 0 of delta test count OK |
| 0B | Parity status cleared (DMA/PIT) |
| 0C | Refresh and system time check OK (DMA/PIT) |
| 0D | Refresh link toggling OK (DMA/PIT) |
| 0E | Refresh period ON/OFF 50% OK |
| 10 | About to start 64K memory |
| 11 | Address line tested OK |
| 12 | 64K base memory tested OK |
| 13 | Interrupt vectors initialized |
| 14 | 8042 keyboard controller tested |
| 15 | CMOS Read/Write test OK |
| 16 | CMOS checksum/battery tested |
| 17 | Monochrome mode set OK (6845) |
| 18 | Color (CGA) mode set OK (6845) |
| 19 | Video ROM search |
| 1A | Optional video ROM OK |
| 1B | Display memory Read/Write test OK |
| 1C | Alternate display memory OK |
| 1D | Video retrace check Ok |
| 1E | Global byte set for video Ok |
| 1F | Mode set for mono/color OK |
| 20 | Video test OK |
| 21 | Video display OK |
| 22 | Power on message display OK |
| 30 | Readying virtual mode memory test |
| 31 | Virtual mode memory test started |
| 32 | Processor in virtual mode |
| 33 | Memory address line test |
| 34 | Memory address line test |
| 35 | Memory below 1MB calculated |
| 36 | Memory size computation OK |
| 37 | Memory test in progress |
| 38 | Memory initialization below 1MB |
| 39 | Memory initialization above 1MB |
| 3A | Display memory size |
| 3B | Ready to start memory below 1MB |
| 3C | Memory test below 1MB OK |
| 3D | Memory test above 1MB OK |
| 3E | Ready to switch to real mode |
| 3F | Shutdown successful |
| 40 | Ready to disable gate A-20 (8042) |
| 41 | Gate A-20 disabled (8042) |
| 42 | About to test DMA controller (8237) |
| 4E | Address line test OK |
| 4F | Processor in real mode |
| 50 | DMA page register test OK |
| 51 | DMA unit-1 base register OK |
| 52 | DMA unit-1 channel register OK |
| 53 | DMA channel-2 base register test OK |
| 54 | About to test both units OK |
| 55 | F/F latch tests both units OK |
| 56 | DMA units 1 & 2 programmed OK |
| 57 | 8259 PIC initialization OK |
| 58 | 8259 PIC mask register check OK |
| 59 | Master 8259 PIC mask register OK |
| 5A | Check timer and keyboard Interrupt |
| 5B | PIT timer Interrupt OK |
| 5C | About to test keyboard Interrupt |
| 5D | ERROR! Timer/keyboard Interrupt |
| 5E | 8259 PIC Interrupt controller error |
| 5F | 8259 PIC Interrupt controller test OK |
| 70 | Start of keyboard test |
| 71 | Keyboard test OK |
| 72 | Keyboard test OK |
| 73 | Keyboard global data initialize (8042) |
| 74 | Floppy controller setup about to start |
| 75 | Floppy controller setup OK |
| 76 | Hard disk controller setup about to start |
| 77 | Hard disk controller setup OK |
| 79 | About to initialize timer data |
| 7A | Verify CMOS battery power |
| 7B | CMOS battery verification done |
| 7D | Analyze test results for memory |
| 7E | CMOS memory size update OK |
| 7F | Check optional ROM C0000h |
| 80 | Keyboard sensed to enable setup |
| 81 | Optional ROM control OK |
| 82 | Printer global data init OK |
| 83 | RS-232 global data init OK |
| 84 | 80287 check/test OK |
| 85 | About to display soft error |
| 86 | Give control to system ROM E0000h |
| 87 | System ROM E0000h check over |
| 00 | Call to Interrupt 19 for boot loader |
| 00 | Control to Int 19 boor loader |
| 01 | CPU flag test |
| 02 | Power-on delay |
| 03 | Chipset initialization |
| 04 | Soft/hard reset |
| 05 | ROM enable |
| 06 | ROM BIOS checksum |
| 07 | 8042 keyboard controller tested |
| 08 | 8042 keyboard controller tested |
| 09 | 8042 keyboard controller tested |
| 0A | 8042 keyboard controller tested |
| 0B | 8042 protected mode tested |
| 0C | 8042 keyboard controller tested |
| 0D | 8042 keyboard controller tested, CMOS |
| 0E | CMOS checksum tested |
| 0F | CMOS initialization |
| 10 | CMOS/RTC status OK |
| 11 | DMA/PIC disable |
| 12 | DMA/PIC initialization |
| 13 | Chipset/memory initialization |
| 14 | 8254 PIT timer tested |
| 15 | 8254 PIT channel 2 timer tested |
| 16 | 8254 PIT channel 1 timer tested |
| 17 | 8254 PIT channel 0 timer tested |
| 18 | Memory refresh test (PIC) |
| 19 | Memory refresh test (PIC) |
| 1A | Check 15-microsecond refresh (PIT) |
| 1B | Check 30-microsecond refresh (PIT) |
| 20 | Base 64K memory tested |
| 21 | Base 64K memory parity tested |
| 22 | Memory Read/Write |
| 23 | BIOS vector table initialization |
| 24 | BIOS vector table initialization |
| 25 | Turbo check of 8042 keyboard controller |
| 26 | Global data table for keyboard controller; turbo |
| 27 | Video mode tested |
| 28 | Monochrome tested |
| 29 | Color (CGA) tested |
| 2A | Parity-enable tested |
| 2B | Optional system ROM’s check start |
| 2C | Video ROM check |
| 2D | Reinitialize main chipset |
| 2E | Video memory tested |
| 2F | Video memory tested |
| 30 | Video adapter tested |
| 31 | Alternate video adapter tested |
| 32 | Alternate video adapter tested |
| 33 | Video mode tested |
| 34 | Video mode tested |
| 35 | Initialize BIOS ROM data area |
| 36 | Power-on message display |
| 37 | Power-on message display |
| 38 | Read cursor position |
| 39 | Display cursor reference |
| 3A | Display BIOS setup message |
| 40 | Start protected mode tested |
| 41 | Build mode entry |
| 42 | CPU enters protected mode |
| 43 | Protected mode Interrupt enable |
| 44 | Check descriptor tables |
| 45 | Check memory size |
| 46 | Memory Read/Write tested |
| 47 | Base 640K memory tested |
| 48 | Check 640K memory size |
| 49 | Check extended memory size |
| 4A | Verify CMOS extended memory |
| 4B | Check for soft/hard reset |
| 4C | Clear extended memory locations |
| 4D | Update CMOS memory size |
| 4E | Base RAM size displayed |
| 4F | Memory Read/Write test on 640K |
| 50 | Update CMOS on RAM size |
| 51 | Extended memory tested |
| 52 | Re-size extended memory |
| 53 | Return CPU to real mode |
| 54 | Restore CPU registers |
| 55 | A-20 gate disabled |
| 56 | BIOS vector recheck |
| 57 | BIOS vector check complete |
| 58 | Clear BIOS display setup message |
| 59 | DMA, PIT tested |
| 60 | DMA page register tested |
| 61 | DMA #1 tested |
| 62 | DMA #2 tested |
| 63 | BIOS data area check |
| 64 | BIOS data area checked |
| 65 | Initialize DMA chips |
| 66 | 8259 PIC initialization |
| 67 | Keyboard tested |
| 80 | Keyboard reset |
| 81 | Stuck key and batch test |
| 82 | 8042 keyboard controller tested |
| 83 | Lock key check |
| 83 | Compare memory size with CMOS |
| 85 | Password/soft error check |
| 86 | XCMOS/CMOS equipment check |
| 87 | CMOS setup entered |
| 88 | Reinitialize chipset |
| 89 | Display power-on message |
| 8A | Display wait and mouse check |
| 8B | Shadow any option ROM’s |
| 8C | Initialize XCMOS settings |
| 8D | Reset hard/floppy drives |
| 8E | Floppy compare to CMOS |
| 8F | Floppy disk controller initialization |
| 90 | Hard disk compare to CMOS |
| 91 | Hard disk controller initialization |
| 92 | BIOS data table check |
| 93 | BIOS data check hat halfway |
| 94 | Set memory size |
| 95 | Verify display memory |
| 96 | Clear all Interrupts |
| 97 | Optional ROM’s check |
| 98 | Clear all Interrupts |
| 99 | Setup timer data/RS232 base |
| 9A | RS232 test; Locate and test serial ports |
| 9B | Clear all Interrupts |
| 9C | NPU test |
| 9D | Clear all Interrupts |
| 9E | Extended keyboard check |
| 9F | Set numlock |
| A0 | Keyboard reset |
| A1 | Cache memory test |
| A2 | Display any soft errors |
| A3 | Set typematic rate |
| A4 | Set memory wait states |
| A5 | Clear screen |
| A6 | Enable parity/NMI |
| A7 | Clear all Interrupts |
| A8 | Control to ROM at E0000 |
| A9 | Clear all Interrupts |
| AA | Display configuration |
| 00 | Call to Interrupt 19 boot loader |
